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| d a t a sh eet product speci?cation supersedes data of 1997 nov 21 file under integrated circuits, ic12 1999 mar 02 integrated circuits pcf2119x lcd controllers/drivers
1999 mar 02 2 philips semiconductors product speci?cation lcd controllers/drivers pcf2119x contents 1 features 1.1 note 2 applications 3 general description 4 ordering information 5 block diagram 6 pad information 6.1 pad functions 7 functional description 7.1 lcd supply voltage generator 7.2 programming ranges 7.3 lcd bias voltage generator 7.4 oscillator 7.5 external clock 7.6 power-on reset 7.7 power-down mode 7.8 registers 7.9 busy flag 7.10 address counter (ac) 7.11 display data ram (ddram) 7.12 character generator rom (cgrom) 7.13 character generator ram (cgram) 7.14 cursor control circuit 7.15 timing generator 7.16 lcd row and column drivers 7.17 reset function 8 instructions 8.1 clear display 8.2 return home 8.3 entry mode set 8.4 display control (and partial power-down mode) 8.5 cursor or display shift 8.6 function set 8.7 set cgram address 8.8 set ddram address 8.9 read busy flag and read address 8.10 write data to cgram or ddram 8.11 read data from cgram or ddram 9 extended function set instructions and features 9.1 new instructions 9.2 icon control 9.3 im 9.4 ib 9.5 normal/icon mode operation 9.6 screen configuration 9.7 display configuration 9.8 tc1 and tc2 9.9 set v lcd 9.10 reducing current consumption 10 interfaces to mpu 10.1 parallel interface 10.2 i 2 c-bus interface 11 limiting values 12 handling 13 dc characteristics 14 ac characteristics 15 timing characteristics 16 application information 16.1 8-bit operation, 1-line display using external reset 16.2 4-bit operation, 1-line display using external reset 16.3 8-bit operation, 2-line display 16.4 i 2 c-bus operation, 1-line display 17 bonding pad locations 18 definitions 19 life support applications 20 purchase of philips i 2 c components 1999 mar 02 3 philips semiconductors product speci?cation lcd controllers/drivers pcf2119x 1 features single-chip lcd controller/driver 2-line display of up to 16 characters + 160 icons, or 1-line display of up to 32 characters + 160 icons 5 7 character format plus cursor; 5 8 for kana (japanese) and user defined symbols icon mode: reduced current consumption while displaying icons only icon blink function on-chip: C generation of lcd supply voltage, independent of v dd , programmable by instruction (external supply also possible) C temperature compensation of on-chip generated v lcd : - 8to - 12 mv/k at 5.0 v (programmable by instruction) C generation of intermediate lcd bias voltages C oscillator requires no external components (external clock also possible). display data ram: 80 characters character generator rom: 240, 5 8 characters character generator ram: 16, 5 8 characters; 4 characters used to drive 160 icons, 8 characters used if icon blink feature is used in application 4 or 8-bit parallel bus and 2-wire i 2 c-bus interface cmos compatible 18 row and 80 column outputs multiplex rates 1 : 18 (for normal operation), 1 : 9 (for single line operation) and 1 : 2 (for icon only mode) uses common 11 code instruction set (extended) logic supply voltage range, v dd - v ss = 2.2 to 4.0 v (up to 5.5 v if external v lcd is used); chip may be driven with two battery cells display supply voltage range, v lcd - v ss = 2.2 to 6.5 v very low current consumption (20 to 200 m a): C icon mode: <25 m a C power-down mode: <2 m a. 1.1 note icon mode is used to save current. when only icons are displayed, a much lower operating voltage v lcd can be used and the switching frequency of the lcd outputs is reduced. in most applications it is possible to use v dd as v lcd . 2 applications telecom equipment portable instruments point-of-sale terminals. 3 general description the pcf2119x is a low power cmos lcd controller and driver, designed to drive a dot matrix lcd display of 2-line by 16 or 1-line by 32 characters with 5 8 dot format. all necessary functions for the display are provided in a single chip, including on-chip generation of lcd bias voltages, resulting in a minimum of external components and lower system current consumption. the pcf2119x interfaces to most microcontrollers via a 4 or 8-bit bus or via the 2-wire i 2 c-bus. the chip contains a character generator and displays alphanumeric and kana (japanese) characters. the letter x in pcf2119x characterizes the built-in character set. various character sets can be manufactured on request. 4 ordering information type number package name description version pc2119ru/2 - chip with bumps in tray - pc2119su/2 - chip with bumps in tray - pc2119vu/2 - chip with bumps in tray - 1999 mar 02 4 philips semiconductors product speci?cation lcd controllers/drivers pcf2119x 5 block diagram fig.1 block diagram. handbook, full pagewidth mgk891 cursor and data control shift register 5 12 bit data latches column drivers 80 5 80 character generator ram (128 5) (cgram) 16 characters character generator rom (cgrom) 240 characters display data ram (ddram) 80 characters/bytes address counter (ac) instruction decoder instruction register row drivers shift register 18-bit bias voltage generator v lcd generator busy flag data register (dr) i/o buffer oscillator timing generator display address counter v dd1 v lcd2 v ss1 t1 v lcd1 12, 13 14, 15 8, 9 6 t2 7 t3 129 136 1, 2 v dd2 3, 4 c1 to c80 r17dup r1 to r18 osc pd pcf2119x db1 to db3 db0/sa0 db4 to db7 e r/w rs scl sda 18 18 80 5 144 72 131 por 130 7 7 7 8 7 7 8 8 8 137 to 139 118 to 127, 106 to 92 87 to 73, 71 to 57, 52 to 38, 16 to 25 27 to 34, 116 to 109, 26, 117 140 to 143 132, 133 128 135 134 5 v ss2 10, 11 1999 mar 02 5 philips semiconductors product speci?cation lcd controllers/drivers pcf2119x 6 pad information the identification of each pad and its location is given in chapter 17. 6.1 pad functions table 1 pad function description note 1. when the i 2 c-bus is used, the parallel interface pad e must be at logic 0. in the i 2 c-bus read mode db7 to db0 should be connected to v dd1 or left open-circuit. a) when the parallel bus is used, pads scl and sda must be connected to v ss1 or v dd1 ; they must not be left open-circuit. b) if the 4-bit interface is used without reading out from the pcf2119x (i.e. r/ w is set permanently to logic 0), the unused ports db0 to db4 can either be set to v ss1 or v dd1 instead of leaving them open-circuit. symbol description v dd1 supply voltage for all except the high voltage generator. v dd2 supply voltage for the high voltage generator. v ss1 this is the ground pad for all except the high voltage generator. v ss2 this is the ground pad for the high voltage generator. v lcd1 this input is used for the generation of the lcd bias levels. v lcd2 this is the v lcd output pad if v lcd is generated internally. this pad must be connected to v lcd1 . e the data bus clock input is set high to signal the start of a read or write operation; data is clocked in or out of the chip on the negative edge of the clock; note 1. t1 these are three test pads. t1 and t2 must be connected to v ss1 ; t3 is left open-circuit and is not user accessible. t2 t3 r1 to r18; r17dup lcd row driver outputs r1 to r18; these pads output the row select waveforms to the display; r17 and r18 drive the icons. r17 has two pads r17 and r17dup. c1 to c80 lcd column driver outputs c1 to c80. scl i 2 c-bus serial clock input; note 1. por external power-on reset input. pd pd selects the chip power-down mode; for normal operation pd = 0. sda i 2 c-bus serial data input/output; note 1. r/ w this is the read/write input. r/ w selects either the read (r/ w = 1) or write (r/ w = 0) operation. this pad has an internal pull-up resistor. rs the rs input selects the register to be accessed for read and write. rs = 0, selects the instruction register for write and the busy flag and address counter for read. rs = 1, selects the data register for both read and write. this pad has an internal pull-up resistor. db0 to db7 the 8-bit bidirectional data bus (3-state) transfers data between the system controller and the pcf2119x. db7 may be used as the busy ?ag, signalling that internal operations are not yet completed. in 4-bit operations the 4 higher order lines db7 to db4 are used; db3 to db0 must be left open-circuit. data bus line db3 has an alternative function (sa0), when selected this is the i 2 c-bus address pad. each data line has its own internal pull-up resistor; note 1. osc oscillator or external clock input. when the on-chip oscillator is used this pad must be connected to v dd1. 1999 mar 02 6 philips semiconductors product speci?cation lcd controllers/drivers pcf2119x 7 functional description 7.1 lcd supply voltage generator the lcd supply voltage may be generated on-chip. the voltage generator is controlled by two internal 6-bit registers: v a and v b . the nominal lcd operating voltage at room temperature is given by the relationship: 7.2 programming ranges programmed value: 1 to 63. voltage: 1.902 to 6.986 v. t ref =27 c. values producing more than 6.5 v at operating temperature are not allowed. operation above this voltage may damage the device. when programming the operating voltage the v lcd temperature coefficient must be taken into account. values below 2.2 v are below the specified operating range of the chip and are therefore not allowed. value 0 for v a and v b switches the generator off (i.e. v a = 0 in character mode, v b = 0 in icon mode). usually register v a is programmed with the voltage for character mode and register v b with the voltage for icon mode. v op(nom) integer value of register 0.08 2 () 1.82 + = when v lcd is generated on-chip the v lcd pads should be decoupled to v ss with a suitable capacitor. the generated v lcd is independent of v dd and is temperature compensated. when the generator is switched off an external voltage may be supplied at connected pads v lcd1,2 . v lcd1,2 may be higher or lower than v dd . the lcd supply voltage generator ensures that, as long as v dd is in the valid range (2.2 to 4 v), the required peak voltage v op = 5.2 v can be generated at any time. 7.3 lcd bias voltage generator the intermediate bias voltages for the lcd display are also generated on-chip. this removes the need for an external resistive bias chain and significantly reduces the system current consumption. the optimum value of v lcd depends on the multiplex rate, the lcd threshold voltage (v th ) and the number of bias levels. using a 5-level bias scheme for 1 : 18 maximum rate allows v lcd < 5 v for most lcd liquids. the intermediate bias levels for the different multiplex rates are shown in table 2. these bias levels are automatically set to the given values when switching to the corresponding multiplex rate. table 2 bias levels as a function of multiplex rate note 1. the values in the above table are given relative to v op - v ss , e.g. 3/4 means 3/4 (v op - v ss ). 7.4 oscillator the on-chip oscillator provides the clock signal for the display system. no external components are required and the osc pad must be connected to v dd . multiplex rate number of levels v 1 v 2 v 3 v 4 v 5 v 6 1:18 5 v op 3/4 (1) 1/2 1/2 1/4 v ss 1:9 5 v op 3/4 1/2 1/2 1/4 v ss 1:2 4 v op 2/3 2/3 1/3 1/3 v ss 1999 mar 02 7 philips semiconductors product speci?cation lcd controllers/drivers pcf2119x 7.5 external clock if an external clock is to be used this is input at the osc pad. the resulting display frame frequency is given by: only in the power-down state is the clock allowed to be stopped (osc connected to v ss ), otherwise the lcd is frozen in a dc state. 7.6 power-on reset the pc2119x must be reset externally. this is an internal synchronous reset that requires 3 osc cycles to be executed after release of the external reset signal. if no external reset is performed, the chip might start-up in an unwanted state. the external reset is active high. 7.7 power-down mode the chip can be put into power-down mode where all static currents are switched off (no internal oscillator, no bias level generation and all lcd outputs are internally connected to v ss ) when pd = 1. during power-down, information in the rams and the chip state are preserved. instruction execution during power-down is possible when pad osc is externally clocked. 7.8 registers the pcf2119x has two 8-bit registers, an instruction register (ir) and a data register (dr). the register select signal (rs) determines which register will be accessed. the instruction register stores instruction codes such as display clear and cursor shift, and address information for the display data ram (ddram) and character generator ram (cgram). the instruction register can be written to but not read from by the system controller. the data register temporarily stores data to be read from the ddram and cgram. f frame f osc 3072 ------------- = when reading, data from the ddram or cgram corresponding to the address in the instruction register is written to the data register prior to being read by the read data instruction. 7.9 busy ?ag the busy flag indicates the internal status of the pcf2119x. a logic 1 indicates that the chip is busy and further instructions will not be accepted. the busy flag is output to pad db7 when rs = 0 and r/ w = 1. instructions should only be written after checking that the busy flag is at logic 0 or waiting for the required number of cycles. 7.10 address counter (ac) the address counter assigns addresses to the ddram and cgram for reading and writing and is set by the commands set cgram address and set ddram address. after a read/write operation the address counter is automatically incremented or decremented by 1. the address counter contents are output to the bus (db6 to db0) when rs = 0 and r/ w=1. 7.11 display data ram (ddram) the ddram stores up to 80 characters of display data represented by 8-bit character codes. ram locations which are not used for storing display data can be used as general purpose ram. the basic ram to display addressing scheme is shown in fig.2. with no display shift the characters represented by the codes in the first 32 ram locations starting at address 00h in line 1 are displayed. figures 3 and 4 show the display mapping for right and left shift respectively. when data is written to or read from the ddram wrap-around occurs from the end of one line to the start of the next line. when the display is shifted each line wraps around within itself, independently of the others. thus all lines are shifted and wrapped around together. the address ranges and wrap-around operations for the various modes are shown in table 3. table 3 address space and wrap-around operation mode 1 32 2 16 1 9 address space 00 to 4f 00 to 27; 40 to 67 00 to 27 read/write wrap-around (moves to next line) 4f to 00 27 to 40; 67 to 00 27 to 00 display shift wrap-around (stays within line) do not use (make sure, that 4f and 00 are not displayed at the same time.) 27 to 00; 67 to 40 27 to 00 1999 mar 02 8 philips semiconductors product speci?cation lcd controllers/drivers pcf2119x fig.2 ddram to display mapping: no shift. handbook, full pagewidth 00 01 02 03 04 1d 1e 1f 20 21 4c 4d 4e 4f non-displayed ddram addresses 64 65 66 67 40 41 42 43 44 4d 4e 4f 50 51 00 01 02 03 04 0d 0e 0f 10 11 24 25 26 27 non-displayed ddram address line 1 line 2 mgk892 ddram address 2-line display/mux 1 : 9 mode 12345 303132 12345 141516 12345 141516 display position ddram address 1-line display fig.3 ddram to display mapping: right shift: (for 1 32 only as long as 4f and 00 positions are not on display simultaneously). handbook, halfpage mgl536 27 00 01 02 03 67 40 41 42 43 0c 0d 0e 4c 4d 4e ddram address line 1 line 2 2-line display/mux 1 : 9 mode 1 2 3 4 5 14 15 16 1 2 3 4 5 10 11 12 fig.4 ddram to display mapping; left shift: (for 1 32 only as long as 4f and 00 positions are not on display simultaneously). handbook, halfpage 01 04 05 41 42 43 44 45 0e 0f 10 4e 4f 50 ddram address line 1 line 2 2-line display/mux 1 : 9 mode 1 2 3 4 5 30 31 32 1 2 3 4 5 14 15 16 1 2 3 4 5 14 15 16 01 04 05 02 03 02 03 1e 1f 20 display position ddram address 1-line display mgk894 1999 mar 02 9 philips semiconductors product speci?cation lcd controllers/drivers pcf2119x 7.12 character generator rom (cgrom) the character generator rom generates 240 character patterns in a 5 8 dot format from 8-bit character codes. figure 6 shows the character set that is currently implemented. 7.13 character generator ram (cgram) up to 16 user defined characters may be stored in the character generator ram. some cgram characters (see fig.17) are also used to drive icons (6 if icons blink and both icon rows are used in the application; 3 if no blink but both icon rows are used in the application; 0 if no icons are driven by the icon rows). the cgrom and cgram use a common address space, of which the first column is reserved for the cgram (see fig.6). figure 9 shows the addressing principle for the cgram. 7.14 cursor control circuit the cursor control circuit generates the cursor (underline and/or cursor blink as shown in fig.5) at the ddram address contained in the address counter. when the address counter contains the cgram address the cursor will be inhibited. 7.15 timing generator the timing generator produces the various signals required to drive the internal circuitry. internal chip operation is not disturbed by operations on the data buses. 7.16 lcd row and column drivers the pcf2119x contains 18 row and 80 column drivers, which connect the appropriate lcd bias voltages in sequence to the display in accordance with the data to be displayed. r17 and r18 drive the icon rows. the bias voltages and the timing are selected automatically when the number of lines in the display is selected. figures 10 to 13 show typical waveforms. unused outputs should be left unconnected. fig.5 cursor and blink display examples. mga801 cursor 5 x 7 dot character font alternating display cursor display example blink display example 1999 mar 02 10 philips semiconductors product speci?cation lcd controllers/drivers pcf2119x fig.6 character set r in cgrom. handbook, full pagewidth mgl535 xxxx 1111 16 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111 0000 upper 4 bits lower 4 bits xxxx 0000 xxxx 0001 xxxx 0010 xxxx 0011 xxxx 0100 xxxx 0101 xxxx 0110 xxxx 0111 xxxx 1000 xxxx 1001 xxxx 1010 xxxx 1011 xxxx 1100 xxxx 1101 xxxx 1110 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 1999 mar 02 11 philips semiconductors product speci?cation lcd controllers/drivers pcf2119x fig.7 character set s in cgrom. handbook, full pagewidth mgl534 xxxx 1111 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111 0000 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 upper 4 bits lower 4 bits xxxx 0000 xxxx 0001 xxxx 0010 xxxx 0011 xxxx 0100 xxxx 0101 xxxx 0110 xxxx 0111 xxxx 1000 xxxx 1001 xxxx 1010 xxxx 1011 xxxx 1100 xxxx 1101 xxxx 1110 1999 mar 02 12 philips semiconductors product speci?cation lcd controllers/drivers pcf2119x fig.8 character set v in cgrom. handbook, full pagewidth mgl597 xxxx 1111 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111 0000 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 upper 4 bits lower 4 bits xxxx 0000 xxxx 0001 xxxx 0010 xxxx 0011 xxxx 0100 xxxx 0101 xxxx 0110 xxxx 0111 xxxx 1000 xxxx 1001 xxxx 1010 xxxx 1011 xxxx 1100 xxxx 1101 xxxx 1110 1999 mar 02 13 philips semiconductors product speci?cation lcd controllers/drivers pcf2119x fig.9 relationship between cgram addresses, data and display patterns. character code bits 0 to 3 correspond to cgram address bits 3 to 6. cgram address bits 0 to 2 designate the character pattern line position. the 8th line is the cursor position and display is perfor med by logical or with the cursor. data in the 8th position will appear in the cursor position. character pattern column positions correspond to cgram data bits 0 to 4, as shown in fig.6. as shown in figs 6 and 7, cgram character patterns are selected when character code bits 4 to 7 are all logic 0. cgram data = logic 1 cor responds to selection for display. only bits 0 to 5 of the cgram address are set by the set cgram address command. bit 6 can be set using the set ddram address co mmand in the valid address range or by using the auto-increment feature during cgram write. all bits 0 to 6 can be read using the read bu sy flag and address counter command. handbook, full pagewidth mge995 76543210 6543210 43210 higher order bits lower order bits lower order bits higher order bits lower order bits higher order bits 00000000 0000000 0 001 000 010 000 011 0 100 0 00 101 00 0 110 000 111 00000 000 000 001 0 0 0 010 00 00 011 100 101 00 00 110 00 00 111 00000 001 00000001 0001 00000010 00001111 00001111 00001111 00001111 01 0 0000 100 101 110 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 111 character codes (ddram data) cgram address character patterns (cgram data) 43210 0 000 111 000 0 00 10 00 0 1 000 1 1 1 00 1 1 1 111 1 1 1 1 000 1 101 000 111 0 11 11 01 0 0 010 0 1 0 00 0 1 1 010 0 1 0 0 000 character code (cgram data) character pattern example 1 cursor position character pattern example 2 1999 mar 02 14 philips semiconductors product speci?cation lcd controllers/drivers pcf2119x fig.10 mux 1 : 18 lcd waveforms; character mode. handbook, full pagewidth mge996 state 1 (on) state 2 (off) frame n + 1 frame n 123 18123 18 row 1 v lcd v 2 v 3 /v 4 v 5 v ss row 9 v lcd v 2 v 3 /v 4 v 5 v ss row 2 v lcd v 2 v 3 /v 4 v 5 v ss col1 v lcd v 2 v 3 /v 4 v 5 v ss col2 v lcd v 2 v 3 /v 4 v 5 v ss 0 v state 1 v op 0.5v op 0.25v op - 0.25v op - 0.5v op - v op 0 v state 2 v op 0.5v op 0.25v op - 0.25v op - 0.5v op - v op r1 r2 r3 r4 r5 r6 r7 r8 r9 1999 mar 02 15 philips semiconductors product speci?cation lcd controllers/drivers pcf2119x fig.11 mu x1:9 lcd waveforms; character mode. r10 to 18 to be left open. handbook, full pagewidth mgk900 state 1 (on) state 2 (off) frame n + 1 frame n 1919 row 1 v lcd v 2 v 3 /v 4 v 5 v ss row 2 v lcd v 2 v 3 /v 4 v 5 v ss row 3 v lcd v 2 v 3 /v 4 v 5 v ss col1 v lcd v 2 v 3 /v 4 v 5 v ss col2 v lcd v 2 v 3 /v 4 v 5 v ss 0 v state 1 v op 0.5v op 0.25v op - 0.25v op - 0.5v op - v op 0 v state 2 v op 0.5v op 0.25v op - 0.25v op - 0.5v op - v op r1 r2 r3 r4 r5 r6 r7 r8 r9 1999 mar 02 16 philips semiconductors product speci?cation lcd controllers/drivers pcf2119x fig.12 mux 1 : 2 lcd waveforms; icon mode. handbook, full pagewidth mge997 frame n + 1 frame n v lcd 2/3 1/3 v ss v lcd 2/3 1/3 v ss v lcd 2/3 1/3 v ss v lcd 2/3 1/3 v ss v lcd 2/3 1/3 v ss v lcd 2/3 1/3 v ss v lcd 2/3 1/3 v ss col 4 off/off col 3 on/on col 2 off /on col 1 on/off row 1 to 16 row 18 row 17 only icons are driven (mux 1 : 2) 1999 mar 02 17 philips semiconductors product speci?cation lcd controllers/drivers pcf2119x fig.13 mux 1 : 2 lcd waveforms; icon mode. v on(rms) = 0.745v op v off(rms) = 0.333v op d v on v off ------------- 2.23 == handbook, full pagewidth mge998 frame n + 1 frame n v op 2/3 v op 1/3 v op 0 - 1/3 v op - 2/3 v op - v op v op 2/3 v op 1/3 v op 0 - 1/3 v op - 2/3 v op - v op v op 2/3 v op 1/3 v op 0 - 1/3 v op - 2/3 v op - v op state 3 col 1 - row 1 to 16 state 2 col 2 - row 17 state 1 col 1 - row 17 state 3 (off) r17 r18 r1-16 v pixel state 1 (on) state 2 (off) 1999 mar 02 18 philips semiconductors product speci?cation lcd controllers/drivers pcf2119x 7.17 reset function the pcf2119x must be reset externally when power is turned on. the reset executes a clear display, requiring 165 oscillator cycles. after the reset the chip has the state shown in table 4. table 4 state after reset step function control bit state condition 1 clear display 2 entry mode set i/d = 1 +1 (increment) s = 0 no shift 3 display control d = 0 display off c = 0 cursor off b = 0 cursor character blink off 4 function set dl = 1 8-bit interface m = 0 1-line display h = 0 normal instruction set sl = 0 mux 1 : 18 mode 5 default address pointer to ddram; the busy flag (bf) indicates the busy state (bf = 1) until initialization ends; the busy state lasts 2 ms; the chip may also be initialized by software; see tables 17 and 18 6 icon control im, ib = 00 icons/icon blink disabled 7 display/screen con?guration l = 0; p = 0; q = 0 default con?gurations 8v lcd temperature coef?cient tc1 = 0; tc2 = 0 default temperature coef?cient 9 set v lcd v a = 0; v b = 0 (v lcd generator off) 10 i 2 c-bus interface reset 1999 mar 02 19 philips semiconductors product speci?cation lcd controllers/drivers pcf2119x 8 instructions only two pcf2119x registers, the instruction register (ir) and the data register (dr) can be directly controlled by the mpu. before internal operation, control information is stored temporarily in these registers, to allow interfacing to various types of mpus which operate at different speeds or to allow interface to peripheral control ics. the pcf2119x operation is controlled by the instructions shown in table 6 together with their execution time. details are explained in subsequent sections. instructions are of 4 types, those that: 1. designate pcf2119x functions such as display format, data length, etc. 2. set internal ram addresses 3. perform data transfer with internal ram 4. others. in normal use, category 3 instructions are used most frequently. however, automatic incrementing by 1 (or decrementing by 1) of internal ram addresses after each data write lessens the mpu program load. the display shift in particular can be performed concurrently with display data write, enabling the designer to develop systems in minimum time with maximum programming efficiency. during internal operation, no instructions other than the read busy flag and read address instructions will be executed. because the busy flag is set to a logic 1 while an instruction is being executed, check to ensure it is a logic 0 before sending the next instruction or wait for the maximum instruction execution time, as given in table 6. an instruction sent while the busy flag is logic 1 will not be executed. table 5 instruction set for i 2 c-bus commands note 1. r/ w is set together with the slave address. control byte command byte i 2 c-bus commands cors000000db7db6db5db4db3db2db1db0 note 1 1999 mar 02 20 philips semiconductors product speci?cation lcd controllers/drivers pcf2119x this text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader .this text is here in _ white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader.this text is here in this text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader. white to force land scape pages to be ... table 6 instruction set with parallel bus commands; note 1 instruction rs r/ w db7 db6 db5 db4 db3 db2 db1 db0 description required clock cycles h=0or1 nop 0000000000no operation 3 function set 00001dl0mslh sets interface data length (dl) and number of display lines (m); single line/mux 1 : 9 (sl), extended instruction set control (h) 3 read busy ?ag and address counter 0 1 bf a c reads the busy flag (bf) indicating internal operating is being performed and reads address counter contents 0 read data 1 1 read data reads data from cgram or ddram 3 write data 1 0 write data writes data from cgram or ddram 3 h=0 clear display 0000000001 clears entire display and sets ddram address 0 in address counter 165 return home 0000000010 sets ddram address 0 in address counter; also returns shifted display to original position; ddram contents remain unchanged 3 entry mode set 00000001i/ds sets cursor move direction and speci?es shift of display; these operations are performed during data write and read 3 display control 0000001dcb sets entire display on/off (d), cursor on/off (c) and blink of cursor position character (b); d = 0 (display off) puts chip into the power-down mode 3 cursor/display shift 000001s/cr/l00 moves cursor and shifts display without changing ddram contents 3 set cgram address 0001 a cg sets cgram address; bit 6 is to be set by the command set ddram address; look at the description of the commands 3 set ddram address 001 a dd sets ddram address 3 1999 mar 02 21 philips semiconductors product speci?cation lcd controllers/drivers pcf2119x this text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader .this text is here in _ white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader.this text is here in this text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader. white to force land scape pages to be ... note 1. x = dont care. h=1 reserved 0000000001do not use - screen con?guration 000000001l set screen con?guration 3 display con?guration 00000001pq set display con?guration 3 icon control 0000001imib0 set icon mode (im), icon blink (ib) 3 temperature control 00000100tc1tc2 set temperature coef?cient (tcx) 3 reserved 0001 xxxxxxdo not use - set v lcd 0 0 1 v voltage store v lcd in register v a or v b (v) 3 instruction rs r/ w db7 db6 db5 db4 db3 db2 db1 db0 description required clock cycles 1999 mar 02 22 philips semiconductors product speci?cation lcd controllers/drivers pcf2119x table 7 explanations of symbols used in table 6 table 8 explanation of tc1 and tc2 used in table 6 bit state logic 0 logic 1 i/d decrement increment s display freeze display shift d display off display on c cursor off cursor on b cursor character blink off: character at cursor position does not blink cursor character blink on: character at cursor position blinks s/c cursor move display shift r/l left shift right shift dl 4 bits 8 bits h use basic instruction set use extended instruction set l (no impact, if m = 1 or sl = 1) left/right screen: standard connection (as in pcf2114) left/right screen: mirrored connection (as in pcf2116) 1st 16 characters of 32: columns are from 1to80 1st 16 characters of 32: columns are from 1to80 2nd 16 characters of 32: columns are from 1to80 2nd 16 characters of 32: columns are from 80 to 1 p column data: left to right (as in pcf2116); column data is displayed from 1 to 80 column data: right to left; column data is displayed from 80 to 1 q row data: top to bottom (as in pcf2116); row data is displayed from 1 to 16 and icon row data is in 17 and 18 row data: bottom to top; row data is displayed from 16 to 1 and icon row data is in 18 and 17 im character mode; full display icon mode; only icons displayed ib icon blink disabled icon blink enabled v set v a set v b m (no impact, if sl = 1) 1-line by 32 display 2-line by 16 display sl mux 1 : 18 (1 32 or 2 16 character display) mu x1:9 (1 16 character display) c 0 last control byte; see table 5 another control byte follows after data/command tc1 tc2 description 00v lcd temperature coef?cient 0 10v lcd temperature coef?cient 1 01v lcd temperature coef?cient 2 11v lcd temperature coef?cient 3; for ranges for tc see chapter 13 1999 mar 02 23 philips semiconductors product speci?cation lcd controllers/drivers pcf2119x fig.14 4-bit transfer example. mga804 rs e db7 r/w db6 db5 db4 instruction write busy flag and address counter read data register read ir7 ir3 bf ac3 dr7 dr3 ir6 ir2 ac6 ac2 dr6 dr2 ir5 ir1 ac5 ac1 dr5 dr1 ir4 ir0 ac4 ac0 dr4 dr0 fig.15 an example of 4-bit data transfer timing sequence. ir7, ir3: instruction 7th, 3rd bit. ac3: address counter 3rd bit. d7, d3: data 7th, 3rd bit. mga805 rs e internal db7 r/w internal operation ir7 ir3 ac3 d7 d3 not busy ac3 busy instruction write busy flag check busy flag check instruction write 1999 mar 02 24 philips semiconductors product speci?cation lcd controllers/drivers pcf2119x fig.16 example of busy flag checking timing sequence. mga806 instruction write busy flag check busy flag check busy flag check instruction write internal operation rs e internal db7 r/w data busy busy not busy data 8.1 clear display clear display writes character code 20h into all ddram addresses (the character pattern for character code 20h must be a blank pattern), sets the ddram address counter to logic 0 and returns the display to its original position, if it was shifted. thus, the display disappears and the cursor or blink position goes to the left edge of the display. sets entry mode i/d = 1 (increment mode). s of entry mode does not change. the instruction clear display requires extra execution time. this may be allowed by checking the busy flag (bf) or by waiting until the 165 clock cycles have elapsed. the latter must be applied where no read-back options are foreseen, as in some chip-on-glass (cog) applications. 8.2 return home return home sets the ddram address counter to logic 0 and returns the display to its original position if it was shifted. ddram contents do not change. the cursor or blink position goes to the left of the first display line. i/d and s of entry mode do not change. 8.3 entry mode set 8.3.1 i/d when i/d = 1 (0) the ddram or cgram address increments (decrements) by 1 when data is written into or read from the ddram or cgram. the cursor or blink position moves to the right when incremented and to the left when decremented. the cursor underline and cursor character blink are inhibited when the cgram is accessed. 8.3.2 s when s = 1, the entire display shifts either to the right (i/d = 0) or to the left (i/d = 1) during a ddram write. thus it appears as if the cursor stands still and the display moves. the display does not shift when reading from the ddram, or when writing to or reading from the cgram. when s = 0, the display does not shift. 1999 mar 02 25 philips semiconductors product speci?cation lcd controllers/drivers pcf2119x 8.4 display control (and partial power-down mode) 8.4.1 d the display is on when d = 1 and off when d = 0. display data in the ddram is not affected and can be displayed immediately by setting d to a logic 1. when the display is off (d = 0) the chip is in partial power-down mode: the lcd outputs are connected to v ss the lcd generator and bias generator are turned off. three oscillator cycles are required after sending the display off instruction to ensure all outputs are at v ss , afterwards osc can be stopped. if the oscillator is running during partial power-down mode (display off) the chip can still execute instructions. even lower current consumption is obtained by inhibiting the oscillator (osc = v ss ). to ensure i dd <1 m a, the parallel bus pads db7 to db0 should be connected to v dd ; rs and r/ w to v dd or left open-circuit and pd to v dd . recovery from power-down mode: pd back to logic 0, if necessary osc back to v dd and send a display control instruction with d = 1. 8.4.2 c the cursor is displayed when c = 1 and inhibited when c = 0. even if the cursor disappears, the display functions i/d, etc. remain in operation during display data write. the cursor is displayed using 5 dots in the 8th line (see fig.5). 8.4.3 b the character indicated by the cursor blinks when b = 1. the cursor character blink is displayed by switching between display characters and all dots on with a period of approximately 1 second, with the cursor underline and the cursor character blink can be set to display simultaneously. f blink f osc 52 224 ---------------- - = 8.5 cursor or display shift cursor/display shift moves the cursor position or the display to the right or left without writing or reading display data. this function is used to correct a character or move the cursor through the display. in 2-line displays, the cursor moves to the next line when it passes the last position (40) of the line. when the displayed data is shifted repeatedly all lines shift at the same time; displayed characters do not shift into the next line. the address counter (ac) content does not change if the only action performed is shift display, but increments or decrements with the cursor shift. 8.6 function set 8.6.1 dl ( parallel mode only ) sets interface data width. data is sent or received in bytes (db7 to db0) when dl = 1 or in two nibbles (db7 to db4) when dl = 0. when 4-bit width is selected, data is transmitted in two cycles using the parallel bus. in a 4-bit application db3 to db0 should be left open-circuit (internal pull-ups). hence in the first function set instruction after power-on, n and h are set to logic 1. a second function set must then be sent (2 nibbles) to set n and h to their required values. function set from the i 2 c-bus interface sets the dl bit to logic 1. 8.6.2 m selects either 1-line by 32 display (m = 0) or 2-line by 16 display (m = 1). 8.6.3 sl selects mu x 1 : 9, 1-line by 16 display (independent of m and l). only rows 1 to 8 and 17 are to be used. all other rows must be left open-circuit. the ddram map is the same as in the 2-line by 16 display mode, however, the second line is not displayable. 1999 mar 02 26 philips semiconductors product speci?cation lcd controllers/drivers pcf2119x 8.6.4 h when h = 0 the chip can be programmed via the standard 11 instruction codes used in the pcf2116 and other lcd controllers. when h = 1 the extended range of instructions will be used. these are mainly for controlling the display configuration and the icons. 8.7 set cgram address set cgram address sets bits 5 to 0 of the cgram address a cg into the address counter (binary a5 to a0). data can then be written to or read from the cgram. attention: the cgram address uses the same address register as the ddram address and consists of 7 bits (binary a6 to a0). with the set cgram address command, only bits 5 to 0 are set. bit 6 can be set using the set ddram address command first, or by using the auto-increment feature during cgram write. all bits 6 to 0 can be read using the read busy flag and read address command. when writing to the lower part of the cgram, ensure that bit 6 of the address is not set (e.g. by an earlier ddram write or read action). 8.8 set ddram address set ddram address sets the ddram address a dd into the address counter (binary a6 to a0). data can then be written to or read from the ddram. 8.9 read busy ?ag and read address read busy flag and read address read the busy flag (bf) and address counter (ac). bf = 1 indicates that an internal operation is in progress. the next instruction will not be executed until bf = 0. it is recommended that the bf status is checked before the next write operation is executed. at the same time, the value of the address counter expressed in binary a6 to a0 is read out. the address counter is used by both cgram and ddram, and its value is determined by the previous instruction. 8.10 write data to cgram or ddram write data writes binary 8-bit data d7 to d0 to the cgram or the ddram. whether the cgram or ddram is to be written into is determined by the previous set cgram address or set ddram address command. after writing, the address automatically increments or decrements by 1, in accordance with the entry mode. only bits d4 to d0 of cgram data are valid, bits d7 to d5 are dont care. 8.11 read data from cgram or ddram read data reads binary 8-bit data d7 to d0 from the cgram or ddram. the most recent set address command determines whether the cgram or ddram is to be read. the read data instruction gates the content of the data register (dr) to the bus while e is high. after e goes low again, internal operation increments (or decrements) the ac and stores ram data corresponding to the new ac into the dr. there are only three instructions that update the data register: set cgram address set ddram address read data from cgram or ddram. other instructions (e.g. write data, cursor/display shift, clear display and return home) do not modify the data register content. 1999 mar 02 27 philips semiconductors product speci?cation lcd controllers/drivers pcf2119x 9 extended function set instructions and features 9.1 new instructions h = 1, sets the chip into alternate instruction set mode. 9.2 icon control the pcf2119x can drive up to 160 icons. see fig.17 for cgram to icon mapping. 9.3 im when im = 0, the chip is in character mode. in the character mode characters and icons are driven (mux 1 : 18). the v lcd generator, if used, produces the v lcd voltage programmed in register v a . when im = 1, the chip is in icon mode. in the icon mode only the icons are driven (mux 1 : 2) and the v lcd voltage generator, if used, produces the v lcd voltage as programmed in register v b . 9.4 ib icon blink control is independent of the cursor/character blink function. when ib = 0, icon blink is disabled. icon data is stored in cgram character 0 to 3 (4 8 5 = 160 bits for 160 icons). when ib = 1, icon blink is enabled. in this case each icon is controlled by two bits. blink consists of two half phases (corresponding to the cursor on and off phases called even and odd phases hereafter). icon states for the even phase are stored in cgram characters 0 to 3 (4 8 5 = 160 bits for 160 icons). these bits also define icon state when icon blink is not used. icon states for the odd phase are stored in cgram character 4 to 7 (another 160 bits for the 160 icons). when icon blink is disabled cgram characters 4 to 6 may be used as normal cgram characters. table 9 blink effect for icons and cursor character blink parameter even phase odd phase cursor underline on off cursor character blink block (all on) normal (display character) icons state 1: cgram character 0 to 2 state 2: cgram character 4 to 6 1999 mar 02 28 philips semiconductors product speci?cation lcd controllers/drivers pcf2119x fig.17 cgram to icon mapping. cgram data bit = logic 1 turns the icon on, data bit = logic 0 turns the icon off. data in character codes 0 to 2 define the icon state when icon blink is disabled or during the even phase when icon blink is enab led. data in character codes 4 to 6 define the icon state during the odd phase when icon blink is enabled (not used for icons when ico n blink is disabled). handbook, full pagewidth mgk999 156-160 odd (blink) 18/76-80 0 0 0 0 0 1 1 1 icon view 0 1 1 1 1 1 1 0 0 1 1 0 1-5 odd (blink) 17/1-5 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 156-160 even 18/76-80 0 0 0 0 0 0 1 1 0 0 1 1 1 1 1 1 1 1 0 1 81-85 even 18/1-5 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 1 1 0 0 0 76-80 even 17/76-80 0 0 0 0 0 0 0 1 0 0 0 1 1 1 1 1 1 1 1 1 11-15 even 17/11-15 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 1 1 1 0 6-10 even 17/6-10 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 1 0 1-5 even 17/1-5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 1 7 6 5 4 3 2 1 0 msb lsb lsb msb msb lsb 6 5 4 3 2 1 0 4 3 2 1 0 icon no. phase row/col character codes cgram address cgram data handbook, full pagewidth col 1 to 5 12345 81 82 83 84 85 display: row 17 row 18 block of 5 columns col 6 to 10 678910 86 87 88 89 90 col 76 to 80 76 77 78 79 80 156 157 158 159 160 mgl249 1999 mar 02 29 philips semiconductors product speci?cation lcd controllers/drivers pcf2119x 9.5 normal/icon mode operation 9.6 screen con?guration l: default is l = 0. l = 0: the two halves of a split screen are connected in a standard way i.e. column 1/81, 2/82 to 80/160. l = 1: the two halves of a split screen are connected in a mirrored way i.e. column 1/160, 2/159 to 80/81. this allows single layer pcb or glass layout. 9.7 display con?guration p, q: default is p, q = 0. p = 1: mirrors the column data. q = 1: mirrors the row data. 9.8 tc1 and tc2 default is tc1 and tc2 = 0. this selects the default temperature coefficient for the internally generated v lcd . tc1 and tc2 = 10, 01 and 11 selects alternative temperature coefficients 1, 2 and 3 respectively. 9.9 set v lcd the v lcd value is programmed by instruction. two on-chip registers hold v lcd values for the character mode and the icon mode respectively (v a and v b ). the generated v lcd value is independent of v dd , allowing battery operation of the chip. v lcd programming: 1. send function set instruction with h = 1 2. send set v lcd instruction to write to voltage register: a) db7, db6 = 10: db5 to db0 are v lcd of character mode (v a ) b) db7, db6 = 11: db5 to db0 are v lcd of icon mode (v b ) c) db5 to db0 = 000000 switches v lcd generator off (when selected) d) during display off and power-down the v lcd generator is also disabled. 3. send function set instruction with h = 0 to resume normal programming. im condition v lcd 0 character mode generates v a 1 icon mode generates v b 9.10 reducing current consumption reducing current consumption can be achieved by one of the options given in table 10. when v lcd lies outside the v dd range and must be generated, it is usually more efficient to use the on-chip generator than an external regulator. table 10 reducing current consumption table 11 use of the v a and v b registers original mode alternative mode character mode icon mode (control bit im) display on display off (control bit d) any mode power-down (pd pad) mode v a v b normal operation v lcd character mode v lcd icon mode 1999 mar 02 30 philips semiconductors product speci?cation lcd controllers/drivers pcf2119x 10 interfaces to mpu 10.1 parallel interface the pcf2119x can send data in either two 4-bit operations or one 8-bit operation and can thus interface to 4-bit or 8-bit microcontrollers. in 8-bit mode data is transferred as 8-bit bytes using the 8 data lines db7 to db0. three further control lines e, rs and r/ w are required; see section 6.1. in 4-bit mode data is transferred in two cycles of 4 bits each using pads db7 to db4 for the transaction. the higher order bits (corresponding to db7 to db4 in 8-bit mode) are sent in the first cycle and the lower order bits (db3 to db0 in 8-bit mode) in the second. data transfer is complete after two 4-bit data transfers. it should be noted that two cycles are also required for the busy flag check. 4-bit operation is selected by instruction, see figs 14 to 16 for examples of bus protocol. in 4-bit mode, pads db3 to db0 must be left open-circuit. they are pulled up to v dd internally. 10.2 i 2 c-bus interface the i 2 c-bus is for bidirectional, two-line communication between different ics or modules. the two lines are the serial data line (sda) and the serial clock line (scl). both lines must be connected to a positive supply via pull-up resistors. data transfer may be initiated only when the bus is not busy. each byte of eight bits is followed by an acknowledge bit. the acknowledge bit is a high level signal put on the bus by the transmitter during which time the master generates an extra acknowledge related clock pulse. a slave receiver which is addressed must generate an acknowledge after the reception of each byte. also a master receiver must generate an acknowledge after the reception of each byte that has been clocked out of the slave transmitter. the device that acknowledges must pull-down the sda line during the acknowledge clock pulse, so that the sda line is stable low during the high period of the acknowledge related clock pulse (set-up and hold times must be taken into consideration). a master receiver must signal an end of data to the transmitter by not generating an acknowledge on the last byte that has been clocked out of the slave. in this event the transmitter must leave the data line high to enable the master to generate a stop condition. 10.2.1 i 2 c- bus protocol before any data is transmitted on the i 2 c-bus, the device which should respond is addressed first. the addressing is always carried out with the first byte transmitted after the start procedure. the i 2 c-bus configuration for the different pcf2119x read and write cycles is shown in figs 22 to 24. the slow down feature of the i 2 c-bus protocol (receiver holds scl low during internal operations) is not used in the pcf2119x. 10.2.2 d efinitions transmitter: the device which sends the data to the bus receiver: the device which receives the data from the bus master: the device which initiates a transfer, generates clock signals and terminates a transfer slave: the device addressed by a master multi-master: more than one master can attempt to control the bus at the same time without corrupting the message arbitration: procedure to ensure that, if more than one master simultaneously tries to control the bus, only one is allowed to do so and the message is not corrupted synchronization: procedure to synchronize the clock signals of two or more devices. fig.18 system configuration. mga807 sda scl master transmitter/ receiver master transmitter slave transmitter/ receiver slave receiver master transmitter/ receiver 1999 mar 02 31 philips semiconductors product speci?cation lcd controllers/drivers pcf2119x fig.19 bit transfer. handbook, full pagewidth mbc621 data line stable; data valid change of data allowed sda scl fig.20 definition of start and stop conditions. handbook, full pagewidth mbc622 sda scl p stop condition sda scl s start condition fig.21 acknowledgement on the i 2 c-bus. handbook, full pagewidth mbc602 s start condition 9 8 2 1 clock pulse for acknowledgement not acknowledge acknowledge data output by transmitter data output by receiver scl from master 1999 mar 02 32 philips semiconductors product speci?cation lcd controllers/drivers pcf2119x this text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader .this text is here in _ white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader.this text is here in this text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader. white to force land scape pages to be ... handbook, full pagewidth mgk899 s a 0 s p 011101 0a slave address control byte a 1 co data byte a control byte a r/w 0 co update data pointer 1 byte n 3 0 bytes 2n 3 0 bytes data byte a acknowledgement from pcf2119x rs rs s a 0 011101 0 pcf2119x slave address r/w fig.22 master transmits to slave receiver; write mode. 1999 mar 02 33 philips semiconductors product speci?cation lcd controllers/drivers pcf2119x this text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader .this text is here in _ white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader.this text is here in this text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader. white to force land scape pages to be ... fig.23 master reads after setting word address; writes word address, set rs; read data. (1) last data byte is a dummy byte (may be omitted). th mgg003 s a 0 s 011101 0 a slave address control byte a 1 co data byte a control byte a r/w 0 co co update data pointer update data pointer 1 byte n 3 0 bytes n bytes last byte 2n 0 bytes data byte (1) a acknowledgement s a 0 s 1a data byte a 1 p slave address data byte acknowledgement acknowledgement no acknowledgement r/w rs rs 1999 mar 02 34 philips semiconductors product speci?cation lcd controllers/drivers pcf2119x fig.24 master reads slave immediately after first byte; read mode (rs previously defined). d book, full pagewidth mgg004 co update data pointer update data pointer n bytes last byte s a 0 s 1a data byte a 1 p slave address data byte acknowledgement from pcf2113x acknowledgement from master no acknowledgement from master r/w fig.25 i 2 c-bus timing diagram. d book, full pagewidth sda mga728 sda scl t su;sta t su;sto t hd;sta t buf t low t hd;dat t high t r t f t su;dat 1999 mar 02 35 philips semiconductors product speci?cation lcd controllers/drivers pcf2119x 11 limiting values in accordance with the absolute maximum rating system (iec 134). 12 handling inputs and outputs are protected against electrostatic discharge in normal handling. however, to be totally safe, it is desirable to take normal precautions appropriate to handling mos devices (see handling mos devices ). symbol parameter min. max. unit v dd supply voltage - 0.5 +6.5 v v lcd lcd supply voltage - 0.5 +7.5 v v i input voltage pads osc, rs, r/ w, e and db7 to db0 - 0.5 v dd + 0.5 v v o output voltage pads r1 to r18, c1 to c80 and v lcd - 0.5 v lcd + 0.5 v i i dc input current - 10 +10 ma i o dc output current - 10 +10 ma i dd , i ss and i lcd v dd , v ss or v lcd current - 50 +50 ma p tot total power dissipation - 400 mw p o power dissipation per output - 100 mw t stg storage temperature - 65 +150 c 1999 mar 02 36 philips semiconductors product speci?cation lcd controllers/drivers pcf2119x 13 dc characteristics v dd = 2.2 to 4.0 v (external v lcd : v dd = 2.2 to 5.5 v); v ss =0v;v lcd = 2.2 to 6.5 v; t amb = - 30 to +85 c; unless otherwise speci?ed. symbol parameter conditions min. typ. max. unit supplies v dd1 supply voltage internal v lcd generation 2.2 - 4.0 v external v lcd generation 2.2 - 5.5 v v dd2 high voltage generator supply voltage internal v lcd generation 2.2 - 4.0 v lcd lcd supply voltage 2.2 - 6.5 v i ss ground supply current external v lcd ; note 1 internal v lcd ; notes 1 and 3 i ss1 ground supply current 1 - 70 120 m a i ss3 ground supply current 3 v dd =3v; v lcd = 5 v; note 2 - 45 80 m a i ss4 ground supply current 4 icon mode; v dd =3v; v lcd = 2.5 v; note 2 - 25 45 m a i ss5 ground supply current 5 power-down mode; v dd =3v; v lcd = 2.5 v; db7 to db0, rs and r/ w = 1; osc = 0; pd = 1 - 25 m a i ss6 ground supply current 6 - 190 400 m a i ss8 ground supply current 8 v dd =3v; v lcd = 5 v; note 2 - 160 400 m a i ss9 ground supply current 9 icon mode; v dd =3v; v lcd = 2.5 v; note 2 - 120 -m a logic v il1 low-level input voltage pads t1, e, rs, r/ w, db7 to db0 and sa0 0 - 0.3v dd v v ih1 high-level input voltage pads t1, e, rs, r/ w, db7 to db0 and sa0 0.7v dd - v dd v v il(pd) low-level input voltage pad pd 0 - 0.2v dd v v ih(pd) high-level input voltage pad pd 0.8v dd - v dd v v il(osc) low-level input voltage pad osc 0 - v dd - 1.5 v v ih(osc) high-level voltage pad osc v dd - 0.1 - v dd v i ol(db) low-level output current pads db7 to db0 v ol = 0.4 v; v dd = 5 v 1.6 4 - ma i oh(db) high-level output current pads db7 to db0 v oh =4v; v dd =5v - 1 - 8 - ma i pu pull-up current pads db7 to db0 v i =v ss 0.04 0.15 1 m a i l leakage current pads osc, e, rs, r/ w, db7 to db0 and sa0 v i =v dd or v ss - 1 - +1 m a 1999 mar 02 37 philips semiconductors product speci?cation lcd controllers/drivers pcf2119x notes 1. lcd outputs are open-circuit; inputs at v dd or v ss ; bus inactive. 2. t amb =25 c; f osc = 200 khz. 3. lcd outputs are open-circuit; hv generator is on; load current i vlcd (at v lcd )=5 m a. 4. tested on sample basis. 5. resistance of output terminals (r1 to r18 and c1 to c80) with a load current of 20 m a; outputs measured one at a time; external v lcd . 6. lcd outputs open-circuit; external v lcd . 7. temperature coefficient at v op = 5.0 v. typical range 2 mv/k. i 2 c-bus sda and scl v il2 low-level input voltage 0 - 0.3v dd v v ih2 high-level input voltage 0.7v dd - 5.5 v i li input leakage current v i =v dd or v ss - 1 - +1 m a c i input capacitance note 4 -- 10 pf i ol(sda) low-level output current sda v ol = 0.4 v; v dd =5v 3 -- ma lcd outputs r o(row) row output resistance pads r1 to r18 note 5 - 10 30 k w r o(col) column output resistance pads c1 to c80 note 5 - 15 40 k w v bias(tol) bias tolerance pads r1 to r18 and c1 to c80 note 6 - 20 130 mv v vlcd(tol) v lcd tolerance t amb =25 c; note 3 v lcd <3v -- 220 mv v lcd <4v -- 270 mv v lcd <5v -- 340 mv v lcd <6v -- 440 mv v lcd = 5.018 v (v a/b = 27h) -- 340 mv tc0 v lcd temperature coef?cient 0 note 7 -- 8.0 - mv/k tc1 v lcd temperature coef?cient 1 note 7 -- 9.0 - mv/k tc2 v lcd temperature coef?cient 2 note 7 -- 10.5 - mv/k tc3 v lcd temperature coef?cient 3 note 7 -- 11.8 - mv/k symbol parameter conditions min. typ. max. unit 1999 mar 02 38 philips semiconductors product speci?cation lcd controllers/drivers pcf2119x 14 ac characteristics v dd = 2.2 to 5.5 v; v ss =0v; v lcd = 2.2 to 6.5 v; t amb = - 40 to +85 c; unless otherwise speci?ed. note 1. all timing values are valid within the operating supply voltage and ambient temperature range and are referenced to v il and v ih with an input voltage swing of v ss to v dd . symbol parameter conditions min. typ. max. unit f fr lcd frame frequency (internal clock) v dd = 5.0 v 45 95 147 hz f osc oscillator frequency (not available at any pad) 140 250 450 khz f osc(ext) external clock frequency 140 - 450 khz t oscst oscillator start-up time after power-down - 200 300 m s bus timing characteristics: parallel interface; note 1 w rite operation ( writing data from mpu to pcf2119 x ) t cy(en) enable cycle time 500 -- ns t w(en) enable pulse width 220 -- ns t su(a) address set-up time 50 -- ns t h(a) address hold time 25 -- ns t su(d) data set-up time 60 -- ns t h(d) data hold time 25 -- ns r ead operation ( reading data from pcf2119 xto mpu) t cy(en) enable cycle time 500 -- ns t w(en) enable pulse width 220 -- ns t su(a) address set-up time 50 -- ns t h(a) address hold time 25 -- ns t d(d) data delay time -- 150 ns t h(d) data hold time 20 - 100 ns timing characteristics: i 2 c-bus interface; note 1 f scl scl clock frequency -- 400 khz t low scl clock low period 1.3 --m s t high scl clock high period 0.6 --m s t su;dat data set-up time 100 -- ns t hd;dat data hold time 0 -- ns t r scl, sda rise time -- 300 ns t f scl, sda fall time -- 300 ns c b capacitive bus line load -- 400 pf t su;sta set-up time for a repeated start condition 0.6 --m s t hd;sta start condition hold time 0.6 --m s t su;sto set-up time for stop condition 0.6 --m s t sw tolerable spike width on bus -- 50 ns 1999 mar 02 39 philips semiconductors product speci?cation lcd controllers/drivers pcf2119x 15 timing characteristics fig.26 parallel bus write operation sequence; writing data from mpu to pcf2119x. handbook, full pagewidth rs e db0 to db7 v v v v v v v v v v v v v t ih1 il1 ih1 il1 ih1 il1 il1 il1 ih1 il1 ih1 il1 v il1 v ih1 il1 cy(en) t su(d) h(d) t t w(en) t h(a) t h(a) t su(a) valid data mbk474 r/w fig.27 parallel bus read operation sequence; reading data from pcf2119x to mpu. handbook, full pagewidth rs r/w e db0 to db7 v v v v v v v v v v ih1 il1 ih1 il1 ih1 il1 ih1 il1 v ol1 v oh1 il1 t cy(en) h(d) t t w(en) t h(a) t h(a) t su(a) ih1 v ol1 v oh1 t d(d) v ih1 mbk475 1999 mar 02 40 philips semiconductors product speci?cation lcd controllers/drivers pcf2119x 16 application information fig.28 direct connection to 8-bit mpu; 8-bit bus. handbook, full pagewidth pcf2119x mgk895 p80cl51 2 16 character lcd display plus 160 icons 16 8 c1 to c80 80 2 rs p20 p21 e p22 db7 to db0 p17 to p10 r17, r18 r1 to r16 r/w fig.29 direct connection to 8-bit mpu; 4-bit bus. handbook, full pagewidth pcf2119x mgk896 p80cl51 2 16 character lcd display plus 160 icons 16 4 c1 to c80 80 2 rs p10 p11 e p12 db7 to db4 p17 to p14 r17, r18 r1 to r16 r/w fig.30 typical application using parallel interface. handbook, full pagewidth mgk897 pcf2119x 2 16 character lcd display plus 160 icons 16 8 c1 to c80 80 2 osc rs db7 to db0 e 100 nf 100 nf r17, r18 r1 to r16 v dd v ss v dd v lcd v ss r/w 1999 mar 02 41 philips semiconductors product speci?cation lcd controllers/drivers pcf2119x fig.31 application using i 2 c-bus interface. handbook, full pagewidth v dd v dd scl sda master transmitter pcf84c81a; p80cl410 pcf2119x 2 16 character lcd display plus 160 icons 16 c1 to c80 80 2 osc scl sda db3/sao 100 nf 100 nf r17, r18 r1 to r16 v dd v dd v ss v dd v lcd v ss pcf2119x 1 32 character lcd display plus 160 icons 16 c1 to c80 80 2 osc scl sda db3/sao 100 nf 100 nf r17, r18 r1 to r16 v ss v dd v ss v dd v lcd v ss mgk898 1999 mar 02 42 philips semiconductors product speci?cation lcd controllers/drivers pcf2119x 16.1 8-bit operation, 1-line display using external reset table 13 shows an example of a 1-line display in 8-bit operation. the pcf2119x functions must be set by the function set instruction prior to display. since the ddram can store data for 80 characters, the ram can be used for advertising displays when combined with display shift operation. since the display shift operation changes display position only and the ddram contents remain unchanged, display data entered first can be displayed when the return home operation is performed. 16.2 4-bit operation, 1-line display using external reset the program must set functions prior to a 4-bit operation, see table 12. when power is turned on, 8-bit operation is automatically selected and the pcf2119x attempts to perform the first write as an 8-bit operation. since nothing is connected to db0 to db3, a rewrite is then required. however, since one operation is completed in two accesses of 4-bit operation, a rewrite is required to set the functions (see table 12 step 3). thus, db4 to db7 of the function set are written twice. 16.3 8-bit operation, 2-line display for a 2-line display, the cursor automatically moves from the first to the second line after the 40th digit of the first line has been written. thus, if there are only 8 characters in the first line, the ddram address must be set after the 8th character is completed (see table 6). it should be noted that both lines of the display are always shifted together; data does not shift from one line to the other. 16.4 i 2 c-bus operation, 1-line display a control byte is required with most commands (see table 16). table 12 4-bit operation, 1-line display example; using external reset step instruction display operation 1 power supply on (pcf2119x is initialized by the external reset) initialized; no display appears 2 function set rs r/ w db7 db6 db5 db4 sets to 4-bit operation; in this instance operation is handled as 8-bits by initialization and only this instruction completes with one write 000010 3 function set 000010 sets to 4-bit operation, selects 1-line display and v lcd =v 0 ; 4-bit operation starts from this point and resetting is needed 000000 4 display on/off control 000000 _ turns on display and cursor; entire display is blank after initialization 001110 5 entry mode set 000000 _ sets mode to increment the address by 1 and to shift the cursor to the right at the time of write to the dd/cgram; display is not shifted 000110 6 write data to cgram/ddram 100101 p_ writes p; the ddram has already been selected by initialization at power-on; the cursor is incremented by 1 and shifted to the right 100000 1999 mar 02 43 philips semiconductors product speci?cation lcd controllers/drivers pcf2119x this text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader .this text is here in _ white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader.this text is here in this text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader. white to force land scape pages to be ... table 13 8-bit operation, 1-line display example; using external reset (character set a) step instruction display operation 1 power supply on (pcf2119x is initialized by the external reset) initialized; no display appears 2 function set rs r/ w db7 db6 db5 db4 db3 db2 db1 db0 sets to 8-bit operation, selects 1-line display and v lcd =v 0 0000110000 3 display mode on/off control 0000001110 _ turns on display and cursor; entire display is blank after initialization 4 entry mode set 0000000110 _ sets mode to increment the address by 1 and to shift the cursor to the right at the time of the write to the dd/cgram; display is not shifted 5 write data to cgram/ddram 1001010000 p_ writes p; the ddram has already been selected by initialization at power-on; the cursor is incremented by 1 and shifted to the right 6 write data to cgram/ddram 1001001000 ph_ writes h 7to11 | | 12 write data to cgram/ddram 1001010011 philips_ writes s 13 entry mode set 0000000111 philips_ sets mode for display shift at the time of write 14 write data to cgram/ddram 1000100000 hilips _ writes space 15 write data to cgram/ddram 1001001101 ilips m_ writes m 16 | | | 1999 mar 02 44 philips semiconductors product speci?cation lcd controllers/drivers pcf2119x this text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader .this text is here in _ white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader.this text is here in this text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader. white to force land scape pages to be ... 17 write data to cgram/ddram 1001001111 microko writes o 18 cursor/display shift 0000010000 microk o shifts only the cursor position to the left 19 cursor/display shift 0000010000 micro ko shifts only the cursor position to the left 20 write data to cgram/ddram 1001000011 icroc o writes c correction; the display moves to the left 21 cursor/display shift 0000011100 microco shifts the display and cursor to the right 22 cursor/display shift 0000010100 microco_ shifts only the cursor to the right 23 write data to cgram/ddram 1001001101 icrocom_ writes m 24 | | | 25 return home 0000000010 philips m returns both display and cursor to the original position (address 0) step instruction display operation 1999 mar 02 45 philips semiconductors product speci?cation lcd controllers/drivers pcf2119x this text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader .this text is here in _ white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader.this text is here in this text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader. white to force land scape pages to be ... table 14 8-bit operation, 1-line display and icon example; using external reset (character set a) step introduction display operation 1 power supply on (pcf2119x is initialized by the external reset) initialized; no display appears 2 function set rs r/ w db7 db6 db5 db4 db3 db2 db1 db0 sets to 8-bit operation, selects 1-line display and v lcd =v 0 0000110000 3 display mode on/off control 0000001110 _ turns on display and cursor; entire display is blank after initialization 4 entry mode set 0000000110 _ sets mode to increment the address by 1 and to shift the cursor to the right at the time of the write to the dd/cgram; display is not shifted 5 set cgram address 0001000000 _ sets the cgram address to position of character 0; the cgram is selected 6 write data to cgram/ddram 1000001010 _ writes data to cgram for icon even phase; icons appears 7 | | 8 set cgram address 0001110000 _ sets the cgram address to position of character 4; the cgram is selected 9 write data to cgram/ddram 1000001010 _ writes data to cgram for icon odd phase 10 | | 11 function set 0000110001 _ sets h = 1 12 icon control 0000001010 _ icons blink 13 function set 0000110001 _ sets h = 0 1999 mar 02 46 philips semiconductors product speci?cation lcd controllers/drivers pcf2119x this text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader .this text is here in _ white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader.this text is here in this text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader. white to force land scape pages to be ... 14 set ddram address 0 0 1 0 0 0 0 0 0 0 sets the ddram address to the ?rst position; ddram is selected 15 write data to cgram/ddram 1001010000 p_ writes p; the cursor is incremented by 1 and shifted to the right 16 write data to cgram/ddram 1001001000 ph_ writes h 17 to 20 | | 21 return home 0000000010 philips returns both display and cursor to the original position (address 0) step introduction display operation 1999 mar 02 47 philips semiconductors product speci?cation lcd controllers/drivers pcf2119x this text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader .this text is here in _ white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader.this text is here in this text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader. white to force land scape pages to be ... table 15 8-bit operation, 2-line display example; using external reset step introduction display operation 1 power supply on (pcf2119x is initialized by the external reset) initialized; no display appears 2 function set rs r/ w db7 db6 db5 db4 db3 db2 db1 db0 sets to 8-bit operation; selects 2-line display and voltage generator off 0000111000 3 display on/off control 0000001110 _ turns on display and cursor; entire display is blank after initialization 4 entry mode set 0000000110 _ sets mode to increment the address by 1 and to shift the cursor to the right at the time of write to the cg/ddram; display is not shifted 5 write data to cgram/ddram 1001010000 p_ writes p; the ddram has already been selected by initialization at power-on; the cursor is incremented by 1 and shifted to the right 6to10 | | | 11 write data to cgram/ddram 1001010011 philips_ writes s 12 set ddram address 0011000000 philips _ sets ddram address to position the cursor at the head of the 2nd line 13 write data to cgram/ ddram 1001001101 philips m_ writes m 14 to 19 | | | 1999 mar 02 48 philips semiconductors product speci?cation lcd controllers/drivers pcf2119x this text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader .this text is here in _ white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader.this text is here in this text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader. white to force land scape pages to be ... 20 write data to cgram/ddram 1001001111 philips microco_ writes o 21 write data to cgram/ddram 0000000111 philips microco_ sets mode for display shift at the time of write 22 write data to cgram/ddram 1001001101 hilips icrocom_ writes m; display is shifted to the left; the ?rst and second lines shift together 23 | | | 24 return home 0000000010 philips microcom returns both display and cursor to the original position (address 0) step introduction display operation 1999 mar 02 49 philips semiconductors product speci?cation lcd controllers/drivers pcf2119x this text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader .this text is here in _ white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader.this text is here in this text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader. white to force land scape pages to be ... table 16 example of i 2 c-bus operation; 1-line display (using external reset, assuming sa0 = v ss ; note 1) step i 2 c byte display operation 1i 2 c-bus start initialized; no display appears 2 slave address for write sa6 sa5 sa4 sa3 sa2 sa1 sa0 r/ w ack during the acknowledge cycle sda will be pulled-down by the pcf2119x 011101001 3 send a control byte for function set co rs 0 0 0 0 0 0 ack control byte sets rs for following data bytes 000000001 4 function set db7 db6 db5 db4 db3 db2 db1 db0 ack selects 1-line display and v lcd =v 0 ; scl pulse during acknowledge cycle starts execution of instruction 001x00001 5 display on/off control db7 db6 db5 db4 db3 db2 db1 db0 ack _ turns on display and cursor; entire display shows character 20h (blank in ascii-like character sets) 000011101 6 entry mode set db7 db6 db5 db4 db3 db2 db1 db0 ack _ sets mode to increment the address by 1 and to shift the cursor to the right at the time of write to the ddram or cgram; display is not shifted 000001101 7i 2 c start _ for writing data to ddram, rs must be set to 1; therefore a control byte is needed 8 slave address for write sa6 sa5 sa4 sa3 sa2 sa1 sa0 r/ w ack _ 011101001 9 send a control byte for write data co rs 0 0 0 0 0 0 ack _ 010000001 10 write data to ddram db7 db6 db5 db4 db3 db2 db1 db0 ack p_ writes p; the ddram has been selected at power-up; the cursor is incremented by 1 and shifted to the right 010100001 11 write data to ddram db7 db6 db5 db4 db3 db2 db1 db0 ack ph_ writes h 010010001 1999 mar 02 50 philips semiconductors product speci?cation lcd controllers/drivers pcf2119x this text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader .this text is here in _ white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader.this text is here in this text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader. white to force land scape pages to be ... 12 to 15 | | | | 16 write data to ddram db7 db6 db5 db4 db3 db2 db1 db0 ack philips_ writes s 010100111 17 (optional i 2 c stop) i 2 c start + slave address for write (as step 8) philips_ 18 control byte co rs 0 0 0 0 0 0 ack philips_ 100000001 19 return home db7 db6 db5 db4 db3 db2 db1 db0 ack philips sets ddram address 0 in address counter (also returns shifted display to original position; ddram contents unchanged); this instruction does not update the data register (dr) 000000101 20 i 2 c start philips 21 slave address for read sa6 sa5 sa4 sa3 sa2 sa1 sa0 r/ w ack p hilips during the acknowledge cycle the content of the dr is loaded into the internal i 2 c-bus interface to be shifted out; in the previous instruction neither a set address nor a read data has been performed; therefore the content of the dr was unknown; the r/w has to be set to 1 while still in i 2 c-write mode 011101011 22 control byte for read co rs 0 0 0 0 0 0 ack philips ddram content will be read from following instructions 011000001 23 read data: 8 scl + master acknowledge; note 2 db7 db6 db5 db4 db3 db2 db1 db0 ack ph ilips 8 scl; content loaded into interface during previous acknowledge cycle is shifted out over sda; msb is db7; during master acknowledge content of ddram address 01 is loaded into the i 2 c-bus interface xxxxxxxx0 step i 2 c byte display operation 1999 mar 02 51 philips semiconductors product speci?cation lcd controllers/drivers pcf2119x this text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader .this text is here in _ white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader.this text is here in this text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader. white to force land scape pages to be ... notes 1. x = dont care. 2. sda is left at high-impedance by the microcontroller during the read acknowledge. 24 read data: 8 scl + master acknowledge; note 2 db7 db6 db5 db4 db3 db2 db1 db0 ack phi lips 8 scl; code of letter h is read ?rst; during master acknowledge code of i is loaded into the i 2 c interface 010010000 25 read data: 8 scl + no master acknowledge; note 2 db7 db6 db5 db4 db3 db2 db1 db0 ack phi lips no master acknowledge; after the content of the i 2 c-bus interface register is shifted out no internal action is performed; no new data is loaded to the interface register, data register is not updated, address counter is not incremented and cursor is not shifted 010010011 26 i 2 c stop phi lips step i 2 c byte display operation 1999 mar 02 52 philips semiconductors product speci?cation lcd controllers/drivers pcf2119x this text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader .this text is here in _ white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader.this text is here in this text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader. white to force land scape pages to be ... table 17 initialization by instruction, 8-bit interface (note 1) note 1. x = dont care. step description power-on or unknown state | wait 2 ms after external reset has been applied | rs r/ w db7 db6 db5 db4 db3 db2 db1 db0 bf cannot be checked before this instruction 0 0 0 0 1 1 x x x x function set (interface is 8 bits long) | wait 2 ms | rs r/ w db7 db6 db5 db4 db3 db2 db1 db0 bf cannot be checked before this instruction 0 0 0 0 1 1 x x x x function set (interface is 8 bits long) | wait more than 40 m s | rs r/ w db7 db6 db5 db4 db3 db2 db1 db0 bf cannot be checked before this instruction 0 0 0 0 1 1 x x x x function set (interface is 8 bits long) | | bf can be checked after the following instructions; when bf is not checked, the waiting time between instructions is the speci?ed instruction time (see table 3) rs r/ w db7 db6 db5 db4 db3 db2 db1 db0 function set (interface is 8 bits long); specify the number of display lines 0000110m0h 0 0 0 0 0 0 1 0 0 0 display off 0 0 0 0 0 0 0 0 0 1 clear display 0 0 0 0 0 0 0 1 i/d s entry mode set | initialization ends 1999 mar 02 53 philips semiconductors product speci?cation lcd controllers/drivers pcf2119x this text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader .this text is here in _ white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader.this text is here in this text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader. white to force land scape pages to be ... table 18 initialization by instruction, 4-bit interface; not applicable for i 2 c-bus operation step description power-on or unknown state | wait 2 ms after external reset has been applied | rs r/ w db7 db6 db5 db4 bf cannot be checked before this instruction 000011 function set (interface is 8 bits long) | wait 2 ms | rs r/ w db7 db6 db5 db4 bf cannot be checked before this instruction 000011 function set (interface is 8 bits long) | wait 40 m s | rs r/ w db7 db6 db5 db4 bf cannot be checked before this instruction 000011 function set (interface is 8 bits long) | bf can be checked after the following instructions; when bf is not checked, the waiting time between instructions is the speci?ed instruction time (see table 3) rs r/ w db7 db6 db5 db4 function set (set interface to 4 bits long) 000010 interface is 8 bits long 000010 function set (interface is 4 bits long) 0 0 0 m 0 h specify number of display lines 000000 001000 display off 000000 clear display 000001 000000 entry mode set 0001i/ds | initialization ends 1999 mar 02 54 philips semiconductors product speci?cation lcd controllers/drivers pcf2119x 17 bonding pad locations fig.32 bonding pad locations. handbook, full pagewidth mgk890 dummy (v ss1 ) r16 dummy (v ss1 ) r15 c11 r14 c12 r13 c13 r12 c14 r11 c15 r10 c16 r9 c17 r18 c18 c19 c1 c20 c2 c21 c3 c22 c4 c23 c5 c24 c6 c25 c7 dummy (v ss1 ) c8 dummy (v ss1 ) c9 dummy (v ss1 ) c10 scl dummy (v ss1 ) t3 c26 por c27 pd c28 sda c29 sda c30 c31 r/w c32 rs c33 db0 c34 db1 c35 db2 c36 db3 c37 db4 c38 db5 c39 db6 c40 db7 r17dup osc c41 v dd1 c42 v dd1 c43 c44 v dd2 c45 v dd2 c46 c47 e c48 t1 c49 t2 c50 v ss1 c51 v ss1 c52 c53 v ss2 c54 v ss2 c55 dummy (v ss1 ) v lcd1 dummy (v ss1 ) v lcd1 dummy (v ss1 ) v lcd2 v lcd2 c71 c72 c73 c74 dummy (v ss1 ) c75 c56 c76 c57 c77 c58 c78 c59 c79 c60 c80 c61 c62 r17 c63 r1 c64 r2 c65 r3 c66 r4 c67 r5 c68 r6 c69 r7 c70 107 106 105 104 103 102 101 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 1 pc2119-1 rom010 y x 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 r8 dummy (v ss1 ) dummy (v ss1 ) dummy (v ss1 ) 37 36 34 35 1.91 mm 8.64 mm 1999 mar 02 55 philips semiconductors product speci?cation lcd controllers/drivers pcf2119x fig.33 tray details. handbook, full pagewidth mgr977 a 1,1 1,2 2,1 3,1 x,1 x,y 1,y 2,2 1,3 e x y f d b fig.34 tray alignment. the orientation of the ic in a pocket is indicated by the position of the ic type name on the die surface with respect to the chamfer on the upper left corner of the tray. refer to the bonding pad location diagram for the orientating and position of the type name on the die surface. mgr978 handbook, halfpage pcf2119-1 table 19 dimensions for fig.33 dim. description value a pocket pitch, x direction 10.89 mm b pocket pitch, y direction 4.34 mm c pocket width, x direction 8.74 mm d pocket width, y direction 2.01 mm e tray width, x direction 50.67 mm f tray width, y direction 50.67 mm x number of pockets in x direction 4 y number of pockets in y direction 10 1999 mar 02 56 philips semiconductors product speci?cation lcd controllers/drivers pcf2119x table 20 bonding pad locations dimensions in m m; all x/y coordinates are referenced to centre of chip; see fig.32 symbol pad x y v dd1 1 - 117 - 779 v dd1 2 - 16 - 779 v dd2 3 +185 - 779 v dd2 4 +286 - 779 e 5 +486 - 779 t1 6 +587 - 779 t2 7 +688 - 779 v ss1 8 +789 - 779 v ss1 9 +889 - 779 v ss2 10 +1090 - 779 v ss2 11 +1191 - 779 v lcd1 12 +1393 - 779 v lcd1 13 +1493 - 779 v lcd2 14 +1695 - 779 v lcd2 15 +1795 - 779 c71 16 +1996 - 779 c72 17 +2097 - 779 c73 18 +2198 - 779 c74 19 +2298 - 779 c75 20 +2399 - 779 c76 21 +2499 - 779 c77 22 +2600 - 779 c78 23 +2701 - 779 c79 24 +2801 - 779 c80 25 +2902 - 779 r17 26 +3103 - 779 r1 27 +3204 - 779 r2 28 +3304 - 779 r3 29 +3405 - 779 r4 30 +3505 - 779 r5 31 +3606 - 779 r6 32 +3707 - 779 r7 33 +3807 - 779 r8 34 +3908 - 779 dummy (v ss1 ) 35 +4008 - 779 dummy (v ss1 ) 36 3957 779 dummy (v ss1 ) 37 3856 779 c70 38 3756 779 c69 39 3655 779 c68 40 3555 779 c67 41 3454 779 c66 42 3353 779 c65 43 3253 779 c64 44 3152 779 c63 45 3052 779 c62 46 2951 779 c61 47 2850 779 c60 48 2750 779 c59 49 2649 779 c58 50 2549 779 c57 51 2448 779 c56 52 2347 779 dummy (v ss1 ) 53 2247 779 dummy (v ss1 ) 54 1744 779 dummy (v ss1 ) 55 1643 779 dummy (v ss1 ) 56 1543 779 c55 57 1442 779 c54 58 1341 779 c53 59 1241 779 c52 60 1140 779 c51 61 1040 779 c50 62 939 779 c49 63 838 779 c48 64 738 779 c47 65 637 779 c46 66 537 779 c45 67 436 779 c44 68 335 779 c43 69 235 779 c42 70 134 779 c41 71 34 779 r17dup 72 - 67 +779 c40 73 - 168 +779 c39 74 - 268 +779 c38 75 - 369 +779 c37 76 - 469 +779 c36 77 - 570 +779 c35 78 - 671 +779 c34 79 - 771 +779 c33 80 - 872 +779 c32 81 - 972 +779 c31 82 - 1073 +779 symbol pad x y 1999 mar 02 57 philips semiconductors product speci?cation lcd controllers/drivers pcf2119x c30 83 - 1174 +779 c29 84 - 1274 +779 c28 85 - 1375 +779 c27 86 - 1475 +779 c26 87 - 1576 +779 dummy (v ss1 )88 - 1677 +779 dummy (v ss1 )89 - 2180 +779 dummy (v ss1 )90 - 2280 +779 dummy (v ss1 )91 - 2381 +779 c25 92 - 2481 +779 c24 93 - 2582 +779 c23 94 - 2683 +779 c22 95 - 2783 +779 c21 96 - 2884 +779 c20 97 - 2984 +779 c19 98 - 3085 +779 c18 99 - 3186 +779 c17 100 - 3286 +779 c16 101 - 3387 +779 c15 102 - 3487 +779 c14 103 - 3588 +779 c13 104 - 3689 +779 c12 105 - 3789 +779 c11 106 - 3890 +779 dummy (v ss1 ) 107 - 3990 +779 dummy (v ss1 ) 108 - 4141 - 779 r16 109 - 4041 - 779 r15 110 - 3940 - 779 r14 111 - 3840 - 779 r13 112 - 3739 - 779 r12 113 - 3638 - 779 r11 114 - 3538 - 779 r10 115 - 3437 - 779 r9 116 - 3337 - 779 r18 117 - 3236 - 779 c1 118 - 3035 - 779 c2 119 - 2934 - 779 c3 120 - 2834 - 779 c4 121 - 2733 - 779 c5 122 - 2633 - 779 c6 123 - 2532 - 779 c7 124 - 2431 - 779 c8 125 - 2331 - 779 c9 126 - 2230 - 779 symbol pad x y table 21 bump size c10 127 - 2129 - 779 scl 128 - 1928 - 779 t3 129 - 1827 - 779 por 130 - 1726 - 779 pd 131 - 1626 - 779 sda 132 - 1525 - 779 sda 133 - 1425 - 779 r/ w 134 - 1223 - 779 rs 135 - 1123 - 779 db0/sa0 136 - 1022 - 779 db1 137 - 922 - 779 db2 138 - 821 - 779 db3 139 - 720 - 779 db4 140 - 620 - 779 db5 141 - 519 - 779 db6 142 - 419 - 779 db7 143 - 318 - 779 osc 144 - 217 - 779 rec. pat. c1 - +4125 - 762 rec. pat. c2 -- 4125 +762 rec. pat. + - 4095 762 parameter value unit type galvanic pure au - bump width 70 6 m m bump length 90 6 m m bump height 17.5 5 m m height difference in one die <2 m m convex deformation <5 m m pad size, aluminium 85 100 m m passivation opening cbb 58 78 m m wafer thickness 380 25 m m symbol pad x y 1999 mar 02 58 philips semiconductors product speci?cation lcd controllers/drivers pcf2119x 18 definitions 19 life support applications these products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify philips for any damages resulting from such improper use or sale. 20 purchase of philips i 2 c components data sheet status objective speci?cation this data sheet contains target or goal speci?cations for product development. preliminary speci?cation this data sheet contains preliminary data; supplementary data may be published later. product speci?cation this data sheet contains ?nal product speci?cations. limiting values limiting values given are in accordance with the absolute maximum rating system (iec 134). stress above one or more of the limiting values may cause permanent damage to the device. these are stress ratings only and operation of the device at these or at any other conditions above those given in the characteristics sections of the speci?cation is not implied. exposure to limiting values for extended periods may affect device reliability. application information where application information is given, it is advisory and does not form part of the speci?cation. purchase of philips i 2 c components conveys a license under the philips i 2 c patent to use the components in the i 2 c system provided the system conforms to the i 2 c specification defined by philips. this specification can be ordered using the code 9398 393 40011. 1999 mar 02 59 philips semiconductors product speci?cation lcd controllers/drivers pcf2119x notes internet: http://www.semiconductors.philips.com philips semiconductors C a worldwide company ? philips electronics n.v. 1999 sca62 all rights are reserved. reproduction in whole or in part is prohibited without the prior written consent of the copyright owne r. the information presented in this document does not form part of any quotation or contract, is believed to be accurate and reli able and may be changed without notice. no liability will be accepted by the publisher for any consequence of its use. publication thereof does not con vey nor imply any license under patent- or other industrial or intellectual property rights. middle east: see italy netherlands: postbus 90050, 5600 pb eindhoven, bldg. vb, tel. +31 40 27 82785, fax. +31 40 27 88399 new zealand: 2 wagener place, c.p.o. box 1041, auckland, tel. +64 9 849 4160, fax. +64 9 849 7811 norway: box 1, manglerud 0612, oslo, tel. +47 22 74 8000, fax. +47 22 74 8341 pakistan: see singapore philippines: philips semiconductors philippines inc., 106 valero st. salcedo village, p.o. box 2108 mcc, makati, metro manila, tel. +63 2 816 6380, fax. +63 2 817 3474 poland: ul. lukiska 10, pl 04-123 warszawa, tel. +48 22 612 2831, fax. +48 22 612 2327 portugal: see spain romania: see italy russia: philips russia, ul. usatcheva 35a, 119048 moscow, tel. +7 095 755 6918, fax. +7 095 755 6919 singapore: lorong 1, toa payoh, singapore 319762, tel. +65 350 2538, fax. +65 251 6500 slovakia: see austria slovenia: see italy south africa: s.a. philips pty ltd., 195-215 main road martindale, 2092 johannesburg, p.o. box 7430 johannesburg 2000, tel. +27 11 470 5911, fax. +27 11 470 5494 south america: al. vicente pinzon, 173, 6th floor, 04547-130 s?o paulo, sp, brazil, tel. +55 11 821 2333, fax. +55 11 821 2382 spain: balmes 22, 08007 barcelona, tel. +34 93 301 6312, fax. +34 93 301 4107 sweden: kottbygatan 7, akalla, s-16485 stockholm, tel. +46 8 5985 2000, fax. +46 8 5985 2745 switzerland: allmendstrasse 140, ch-8027 zrich, tel. +41 1 488 2741 fax. +41 1 488 3263 taiwan: philips semiconductors, 6f, no. 96, chien kuo n. rd., sec. 1, taipei, taiwan tel. +886 2 2134 2886, fax. +886 2 2134 2874 thailand: philips electronics (thailand) ltd., 209/2 sanpavuth-bangna road prakanong, bangkok 10260, tel. +66 2 745 4090, fax. +66 2 398 0793 turkey: talatpasa cad. no. 5, 80640 gltepe/istanbul, tel. +90 212 279 2770, fax. +90 212 282 6707 ukraine : philips ukraine, 4 patrice lumumba str., building b, floor 7, 252042 kiev, tel. +380 44 264 2776, fax. +380 44 268 0461 united kingdom: philips semiconductors ltd., 276 bath road, hayes, middlesex ub3 5bx, tel. +44 181 730 5000, fax. +44 181 754 8421 united states: 811 east arques avenue, sunnyvale, ca 94088-3409, tel. +1 800 234 7381, fax. +1 800 943 0087 uruguay: see south america vietnam: see singapore yugoslavia: philips, trg n. pasica 5/v, 11000 beograd, tel. +381 11 62 5344, fax.+381 11 63 5777 for all other countries apply to: philips semiconductors, international marketing & sales communications, building be-p, p.o. box 218, 5600 md eindhoven, the netherlands, fax. +31 40 27 24825 argentina: see south america australia: 34 waterloo road, north ryde, nsw 2113, tel. +61 2 9805 4455, fax. +61 2 9805 4466 austria: computerstr. 6, a-1101 wien, p.o. box 213, tel. +43 1 60 101 1248, fax. +43 1 60 101 1210 belarus: hotel minsk business center, bld. 3, r. 1211, volodarski str. 6, 220050 minsk, tel. +375 172 20 0733, fax. +375 172 20 0773 belgium: see the netherlands brazil: see south america bulgaria: philips bulgaria ltd., energoproject, 15th floor, 51 james bourchier blvd., 1407 sofia, tel. +359 2 68 9211, fax. +359 2 68 9102 canada: philips semiconductors/components, tel. +1 800 234 7381, fax. +1 800 943 0087 china/hong kong: 501 hong kong industrial technology centre, 72 tat chee avenue, kowloon tong, hong kong, tel. +852 2319 7888, fax. +852 2319 7700 colombia: see south america czech republic: see austria denmark: sydhavnsgade 23, 1780 copenhagen v, tel. +45 33 29 3333, fax. +45 33 29 3905 finland: sinikalliontie 3, fin-02630 espoo, tel. +358 9 615 800, fax. +358 9 6158 0920 france: 51 rue carnot, bp317, 92156 suresnes cedex, tel. +33 1 4099 6161, fax. +33 1 4099 6427 germany: hammerbrookstra?e 69, d-20097 hamburg, tel. +49 40 2353 60, fax. +49 40 2353 6300 greece: no. 15, 25th march street, gr 17778 tavros/athens, tel. +30 1 489 4339/4239, fax. +30 1 481 4240 hungary: see austria india: philips india ltd, band box building, 2nd floor, 254-d, dr. annie besant road, worli, mumbai 400 025, tel. +91 22 493 8541, fax. +91 22 493 0966 indonesia: pt philips development corporation, semiconductors division, gedung philips, jl. buncit raya kav.99-100, jakarta 12510, tel. +62 21 794 0040 ext. 2501, fax. +62 21 794 0080 ireland: newstead, clonskeagh, dublin 14, tel. +353 1 7640 000, fax. +353 1 7640 200 israel: rapac electronics, 7 kehilat saloniki st, po box 18053, tel aviv 61180, tel. +972 3 645 0444, fax. +972 3 649 1007 italy: philips semiconductors, piazza iv novembre 3, 20124 milano, tel. +39 2 6752 2531, fax. +39 2 6752 2557 japan: philips bldg 13-37, kohnan 2-chome, minato-ku, tokyo 108-8507, tel. +81 3 3740 5130, fax. +81 3 3740 5077 korea: philips house, 260-199 itaewon-dong, yongsan-ku, seoul, tel. +82 2 709 1412, fax. +82 2 709 1415 malaysia: no. 76 jalan universiti, 46200 petaling jaya, selangor, tel. +60 3 750 5214, fax. +60 3 757 4880 mexico: 5900 gateway east, suite 200, el paso, texas 79905, tel. +9-5 800 234 7381, fax +9-5 800 943 0087 printed in the netherlands 465006/00/02/pp60 date of release: 1999 mar 02 document order number: 9397 750 04653 |
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